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| 19-4646; Rev 3; 4/11 High-Temperature Logger iButton with 8KB Data-Log Memory General Description The DS1922E temperature logger iButton(R) is a rugged, self-sufficient system that measures temperature and records the result in a protected memory section. The recording is done at a user-defined rate. A total of 8192 8-bit readings or 4096 16-bit readings, taken at equidistant intervals ranging from 1s to 273hr, can be stored. Additionally, 576 bytes of SRAM store application-specific information. A mission to collect data can be programmed to begin immediately, after a user-defined delay, or after a temperature alarm. Access to the memory and control functions can be password protected. The DS1922E is configured and communicates with a host-computing device through the serial 1-Wire(R) protocol, which requires only a single data lead and a ground return. Every DS1922E is factory lasered with a guaranteed unique 64-bit registration number that allows for absolute traceability. The durable stainlesssteel package is highly resistant to environmental hazards such as dirt, moisture, and shock. Communicates to Host with a Single Digital Signal Up to 15.4kbps at Standard Speed or Up to 125kbps in Overdrive Mode Using 1-Wire Protocol Operating Temperature Range: +15C to +140C DS1922E Common iButton Features Digital Identification and Information by Momentary Contact Unique Factory-Lasered 64-Bit Registration Number Ensures Error-Free Device Selection and Absolute Traceability Because No Two Parts Are Alike Built-In Multidrop Controller for 1-Wire Net Chip-Based Data Carrier Compactly Stores Information Data Can Be Accessed While Affixed to Object Button Shape is Self-Aligning with Cup-Shaped Probes Durable Stainless-Steel Case Engraved with Registration Number Withstands Harsh Environments Easily Affixed with Self-Stick Adhesive Backing, Latched by Its Flange, or Locked with a Ring Pressed Onto Its Rim Presence Detector Acknowledges When Reader First Applies Voltage Meets UL 913, 5th Ed., Rev. 1997-02-24; Intrinsically Safe Apparatus: Approved Under Entity Concept for Use in Class I, Division 1, Group A, B, C, and D Locations* Applications High-Temperature Logging (Process Monitoring, Industrial Temperature Monitoring) Steam Sterilization Features Automatically Wakes Up, Measures Temperature, and Stores Values in 8KB of Data-Log Memory in 8- or 16-Bit Format Digital Thermometer Measures Temperature with 8-Bit (0.5C) or 11-Bit (0.0625C) Resolution Temperature Accuracy: 1.5C from +110C to +140C, 7C typical from +15C to +110C Water Resistant or Waterproof if Placed Inside DS9107 iButton Capsule (Exceeds Water Resistant 3 ATM Requirements) Sampling Rate from 1s Up to 273hr Programmable High and Low Trip Points for Temperature Alarms Programmable Recording Start Delay After Elapsed Time or Upon a Temperature Alarm Trip Point Quick Access to Alarmed Devices Through 1-Wire Conditional Search Function 576 Bytes of General-Purpose Memory Two-Level Password Protection of All Memory and Configuration Registers iButton and 1-Wire are registered trademarks of Maxim Integrated Products, Inc. Ordering Information PART DS1922E-F5# TEMP RANGE +15C to +140C PIN-PACKAGE F5 iButton # Denotes a RoHS-compliant device that may include lead(Pb) that is exempt under the RoHS requirements. Examples of Accessories PART DS9093RA DS9107 DS9490B ACCESSORY Mounting Lock Ring iButton Capsule USB to 1-Wire Adapter Pin Configuration appears at end of data sheet. *Application pending. ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E ABSOLUTE MAXIMUM RATINGS I/O Voltage Range to GND .......................................-0.3V to +6V I/O Sink Current...................................................................20mA Operating Temperature Range ........................+15C to +140C Junction Temperature ......................................................+150C Storage Temperature Range............................-25C to +140C* *Storage or operation above +50C significantly reduces battery life with an upper limit of 300hr cumulative at +140C. The recommended storage temperature for maximum battery lifetime is between +5C and +35C. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VPUP = 3.0V to 5.25V.) PARAMETER Operating Temperature I/O PIN GENERAL DATA 1-Wire Pullup Resistance Input Capacitance Input Load Current High-to-Low Switching Threshold Input Low Voltage Low-to-High Switching Threshold Switching Hysteresis Output Low Voltage Recovery Time (Note 2) Rising-Edge Hold-Off Time Time Slot Duration (Note 2) RPUP CIO IL VTL VIL VTH VHY VOL (Notes 2, 3) (Note 4) I/O pin at VPUP (Notes 5, 6) (Notes 2, 7) (Notes 5, 8) (Note 9) At 4mA (Note 10) Standard speed, RPUP = 2.2k tREC Overdrive speed, RPUP = 2.2k Overdrive speed, directly prior to reset pulse; RPUP = 2.2k (Note 11) Standard speed tSLOT Overdrive speed, VPUP > 4.5V Overdrive speed (Note 12) I/O PIN 1-Wire RESET, PRESENCE-DETECT CYCLE Standard speed, VPUP > 4.5V Reset Low Time (Note 2) tRSTL Standard speed (Note 12) Overdrive speed, VPUP > 4.5V Overdrive speed (Note 12) Presence-Detect High Time t PDH Standard speed, VPUP > 4.5V Standard speed (Note 12) Overdrive speed (Note 12) 480 690 48 70 15 15 2 720 720 80 80 60 63.5 7 s s 5 2 5 0.6 65 8 9.5 s 2.0 s s 0.7 0.09 0.4 100 6 2.2 800 10 3.2 0.3 3.4 N/A 0.4 k pF A V V V V V SYMBOL TA CONDITIONS DS1922E (Note 1) MIN +15 TYP MAX +140 UNITS C tREH 2 _______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory ELECTRICAL CHARACTERISTICS (continued) (VPUP = 3.0V to 5.25V.) PARAMETER Presence-Detect Fall Time (Note 13) SYMBOL tFPD CONDITIONS Standard speed, VPUP > 4.5V Standard speed Overdrive speed Standard speed, VPUP > 4.5V Presence-Detect Low Time t PDL Standard speed (Note 12) Overdrive speed, VPUP > 4.5V (Note 12) Overdrive speed (Note 12) Presence-Detect Sample Time (Note 2) I/O PIN 1-Wire WRITE Standard speed Write-Zero Low Time (Notes 2, 14) Write-One Low Time (Notes 2, 14) I/O PIN 1-Wire READ Read Low Time (Notes 2, 15) Read Sample Time (Notes 2, 15) REAL-TIME CLOCK (RTC) Accuracy Frequency Deviation TEMPERATURE CONVERTER Conversion Time (Note 16) Thermal Response Time Constant (Note 17) Conversion Error (Notes 18, 19) Temperature Cycles Operating Lifetime NTCY tLIFE tCONV RESP F DS1922E MIN 1.5 1.5 0.15 60 60 7 7 65 71.5 8 60 6 7.5 5 1 5 1 tRL + tRL + TYP MAX 5 8 1 240 287 24 28 75 75 9 120 12 12 15 1.95 15 1.95 15 1.95 UNITS s s tMSP Standard speed, VPUP > 4.5V Standard speed Overdrive speed s tW0L Overdrive speed, VPUP > 4.5V (Note 12) Overdrive speed (Note 12) Standard speed Overdrive speed Standard speed Overdrive speed Standard speed Overdrive speed s tW1L s tRL tMSR s s See the RTC Accuracy graph 0C to +125C 8-bit mode 16-bit mode (11 bits) iButton package +15C to +110C (Note 20) +110C to +140C Cycle = ramp from +25C to > +125C and back to +25C (Note 21) Temperature > +125C (Note 21) -1.5 -600 30 240 130 7 +1.5 300 300 +60 75 600 Min/ Month ppm ms s C Cycles Hours _______________________________________________________________________________________ 3 High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E Note 1: Note 2: Note 3: Operation above +125C is restricted to mission operations only. Communication and 1-Wire pin specifications are not specified for operation above +125C. System requirement. Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery times. The specified value here applies to systems with only one device and with the minimum 1-Wire recovery times. For more heavily loaded systems, an active pullup such as that in the DS2480B can be required. Capacitance on the data pin could be 800pF when VPUP is first applied. If a 2.2k resistor is used to pull up the data line 2.5s after VPUP has been applied, the parasite capacitance does not affect normal communications. VTL and VTH are a function of the internal supply voltage, which is a function of VPUP and the 1-Wire recovery times. The VTH and VTL maximum specifications are valid at VPUPMAX (5.25V). In any case, VTL < VTH < VPUP. Voltage below which, during a falling edge on I/O, a logic 0 is detected. The voltage on I/O must be less than or equal to VILMAX whenever the master drives the line low. Voltage above which, during a rising edge on I/O, a logic 1 is detected. After VTH is crossed during a rising edge on I/O, the voltage on I/O must drop by VHY to be detected as logic 0. The I-V characteristic is linear for voltages less than 1V. The earliest recognition of a negative edge is possible at tREH after VTH has been previously reached. Numbers in bold are not in compliance with the published iButton standards. See the Comparison Table. Interval during the negative edge on I/O at the beginning of a presence-detect pulse between the time at which the voltage is 90% of VPUP and the time at which the voltage is 10% of VPUP. in Figure 13 represents the time required for the pullup circuitry to pull the voltage on I/O up from VIL to VTH. The actual maximum duration for the master to pull the line low is tW1LMAX + tF - and tW0LMAX + tF - , respectively. in Figure 13 represents the time required for the pullup circuitry to pull the voltage on I/O up from VIL to the input high threshold of the bus master. The actual maximum duration for the master to pull the line low is tRLMAX + tF. To conserve battery power, use 8-bit temperature logging whenever possible. This number was derived from a test conducted by Cemagref in Antony, France, in July 2000: www.cemagref.fr/English/index.htm Test Report No. E42. Includes +0.1C/-0.2C calibration chamber measurement uncertainty. Warning: Not for use as the sole method of measuring or tracking temperature in products and articles that could affect the health or safety of persons, plants, animals, or other living organisms, including but not limited to foods, beverages, pharmaceuticals, medications, blood and blood products, organs, and flammable and combustible products. User shall assure that redundant (or other primary) methods of testing and determining the handling methods, quality, and fitness of the articles and products should be implemented. Temperature tracking with this product, where the health or safety of the aforementioned persons or things could be adversely affected, is only recommended when supplemental or redundant information sources are used. Data-logger products are 100% tested and calibrated at time of manufacture by Maxim to ensure that they meet all data sheet parameters, including temperature accuracy. User shall be responsible for proper use and storage of this product. As with any sensor-based product, user shall also be responsible for occasionally rechecking the temperature accuracy of the product to ensure it is still operating properly. Guaranteed by design and not production tested. Devices leave the factory after having been run through a few cycles above +125C. This is required for calibration of the device but should not affect lifetime of the device as specified. However, this process results in a nonzero value in the Device Samples Counter register (0223h-0225h), which provides evidence the device has been factory calibrated. Note 4: Note 5: Note 6: Note 7: Note 8: Note 9: Note 10: Note 11: Note 12: Note 13: Note 14: Note 15: Note 16: Note 17: Note 18: Note 19: Note 20: Note 21: 4 _______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory COMPARISON TABLE LEGACY VALUES PARAMETER STANDARD SPEED (s) MIN tSLOT (including tREC) tRSTL tPDH tPDL tW0L 61 480 15 60 60 MAX (undefined) (undefined) 60 240 120 OVERDRIVE SPEED (s) MIN 7 48 2 8 6 MAX (undefined) 80 6 24 16 DS1922E VALUES STANDARD SPEED (s) MIN 65 * DS1922E OVERDRIVE SPEED (s) MIN 9.5 70 2 7 7.5 MAX (undefined) 80 7 28 12 MAX (undefined) 720 63.5 287 120 690 15 60 60 *Intentional change; longer recovery time requirement due to modified 1-Wire front-end. Note: Numbers in bold are not in compliance with the published iButton standards. iButton CAN PHYSICAL SPECIFICATION SIZE WEIGHT SAFETY See the Package Information section. Ca. 3.3 grams Meets UL 913, 5th Ed., Rev. 1997-02-24; Intrinsically Safe Apparatus, approval under Entity Concept for use in Class I, Division 1, Group A, B, C, and D Locations*. *Application pending. RTC Accuracy RTC ACCURACY (TYPICAL) 2 0 -2 DRIFT (MINUTES/MONTH) -4 -6 -8 -10 -12 -14 -16 -18 15 25 35 45 55 65 75 85 95 105 115 125 135 TEMPERATURE (C) _______________________________________________________________________________________ 5 High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E Detailed Description With its extended temperature range, the DS1922E is well suited to monitor processes that require temperatures well above the boiling point of water, such as pasteurization of food items. Note that the initial sealing level of the DS1922E achieves the equivalent of IP56. Aging and use conditions can degrade the integrity of the seal over time, so for applications with significant exposure to liquids, sprays, or other similar environments, it is recommended to place the DS1922E in the DS9107 iButton capsule. The DS9107 provides a watertight enclosure that has been rated to IP68 (refer to Application Note 4126: Understanding the IP (Ingress Protection) Ratings of iButton Data Loggers and Capsules). Software for setup and data retrieval through the 1-Wire interface is available for free download from the iButton website (www.ibutton.com). This software also includes drivers for the serial and USB port of a PC and routines to access the general-purpose memory for storing application- or equipment-specific data files. All iButton data loggers are calibrated/validated against NIST traceable reference devices. Maxim offers a web application to generate validation certificates for the DS1922L, DS1922T, DS1922E, and DS1923 (temperature portion only) data loggers. Input is the iButton's ROM code (or list of codes) and the output is a validation certificate in PDF format. For more information, refer to Application Note 4629: iButton(R) Data-Logger Calibration and NIST Certificate FAQs. Figure 2 shows the hierarchical structure of the 1-Wire protocol. The bus master must first provide one of the eight ROM function commands: Read ROM, Match ROM, Search ROM, Conditional Search ROM, Skip ROM, Overdrive-Skip ROM, Overdrive-Match ROM, or Resume Command. Upon completion of an Overdrive ROM command byte executed at standard speed, the device enters Overdrive Mode, where all subsequent communication occurs at a higher speed. The protocol required for these ROM function commands is described in Figure 11. After a ROM function command is successfully executed, the memory and control functions become accessible and the master can provide any one of the eight available commands. The protocol for these memory and control function commands is described in Figure 9. All data is read and written least significant bit first. Parasite Power The block diagram (Figure 1) shows the parasite-powered circuitry. This circuitry "steals" power whenever the I/O input is high. I/O provides sufficient power as long as the specified timing and voltage requirements are met. The advantages of parasite power are two-fold: 1) By parasiting off this input, battery power is not consumed for 1-Wire ROM function commands, and 2) if the battery is exhausted for any reason, the ROM can still be read normally. The remaining circuitry of the DS1922E is solely operated by battery energy. 64-Bit Lasered ROM Each DS1922E contains a unique ROM code that is 64 bits long. The first 8 bits are a 1-Wire family code. The next 48 bits are a unique serial number. The last 8 bits are a cyclic redundancy check (CRC) of the first 56 bits (see Figure 3 for details). The 1-Wire CRC is generated using a polynomial generator consisting of a shift register and XOR gates as shown in Figure 4. The polynomial is X8 + X5 + X4 + 1. Additional information about the 1-Wire CRC is available in Application Note 27: Understanding and Using Cyclic Redundancy Checks with Maxim iButton Products. The shift register bits are initialized to 0. Then, starting with the least significant bit of the family code, one bit at a time is shifted in. After the 8th bit of the family code has been entered, the serial number is entered. After the last bit of the serial number has been entered, the shift register contains the CRC value. Shifting in the 8 bits of CRC returns the shift register to all 0s. Overview The block diagram in Figure 1 shows the relationships between the major control and memory sections of the DS1922E. The device has five main data components: 64-bit lasered ROM; 256-bit scratchpad; 576-byte general-purpose SRAM; two 256-bit register pages of timekeeping, control, status, and counter registers, and passwords; and 8192 bytes of data-logging memory. Except for the ROM and the scratchpad, all other memory is arranged in a single linear address space. The data-logging memory, counter registers, and several other registers are read only for the user. Both register pages are write protected while the device is programmed for a mission. The password registers, one for a read password and another one for a read/write password, can only be written, never read. 6 _______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E 1-Wire PORT I/O ROM FUNCTION CONTROL 64-BIT LASERED ROM PARASITE-POWERED CIRCUITRY 3V LITHIUM MEMORY FUNCTION CONTROL 256-BIT SCRATCHPAD DS1922E GENERAL-PURPOSE SRAM (512 BYTES) 32.768kHz OSCILLATOR INTERNAL TIMEKEEPING, CONTROL REGISTERS, AND COUNTERS REGISTER PAGES (64 BYTES) THERMAL SENSE ADC USER MEMORY (64 BYTES) CONTROL LOGIC DATA-LOG MEMORY 8KB Figure 1. Block Diagram _______________________________________________________________________________________ 7 High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E BUS MASTER 1-Wire NET OTHER DEVICES DS1922E COMMAND LEVEL: AVAILABLE COMMANDS: READ ROM MATCH ROM SEARCH ROM CONDITIONAL SEARCH ROM SKIP ROM RESUME OVERDRIVE-SKIP ROM OVERDRIVE-MATCH ROM DATA FIELD AFFECTED: 64-BIT ROM, RC-FLAG 64-BIT ROM, RC-FLAG 64-BIT ROM, RC-FLAG 64-BIT ROM, RC-FLAG, ALARM FLAGS, SEARCH CONDITIONS RC-FLAG RC-FLAG RC-FLAG, OD-FLAG 64-BIT ROM, RC-FLAG, OD-FLAG 1-Wire ROM FUNCTION COMMANDS DS1922E-SPECIFIC MEMORY FUNCTION COMMANDS WRITE SCRATCHPAD READ SCRATCHPAD COPY SCRATCHPAD WITH PW READ MEMORY WITH PW AND CRC CLEAR MEMORY WITH PW FORCED CONVERSION START MISSION WITH PW STOP MISSION WITH PW 256-BIT SCRATCHPAD, FLAGS 256-BIT SCRATCHPAD 512-BYTE DATA MEMORY, REGISTERS, FLAGS, PASSWORDS MEMORY, REGISTERS, PASSWORDS MISSION TIMESTAMP, MISSION SAMPLES COUNTER, START DELAY, ALARM FLAGS, PASSWORDS MEMORY ADDRESSES 020Ch TO 020Dh FLAGS, TIMESTAMP, MEMORY ADDRESSES 020Ch TO 020Dh (WHEN LOGGING) FLAGS Figure 2. Hierarchical Structure for 1-Wire Protocol MSB 8-BIT CRC CODE MSB LSB MSB 48-BIT SERIAL NUMBER LSB MSB 8-BIT FAMILY CODE (41h) LSB LSB Figure 3. 64-Bit Lasered ROM POLYNOMIAL = X8 + X5 + X4 + 1 1ST STAGE X0 X1 2ND STAGE X2 3RD STAGE X3 4TH STAGE X4 5TH STAGE X5 6TH STAGE X6 7TH STAGE X7 8TH STAGE X8 INPUT DATA Figure 4. 1-Wire CRC Generator 8 _______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory Memory Figure 5 shows the DS1922E memory map. Pages 0 to 15 contain 512 bytes of general-purpose SRAM. The various registers to set up and control the device fill pages 16 and 17, called register pages 1 and 2 (see Figure 6 for details). Pages 18 and 19 can be used as extension of the general-purpose memory. The data-log logging memory starts at address 1000h (page 128) and extends over 256 pages. The memory pages 20 to 127 are reserved for future extensions. The scratchpad is an additional page that acts as a buffer when writing to the SRAM memory or the register page. The data memory can be written at any time. The access type for the register pages is register-specific and depends on whether the device is programmed for a mission. Figure 6 shows the details. The data-log memory is read only for the user. It is written solely under supervision of the on-chip control logic. Due to the special behavior of the write access logic (write scratchpad, copy scratchpad), it is recommended to only write full pages at a time. This also applies to the register pages. See the Address Registers and Transfer Status section for details. DS1922E 32-BYTE INTERMEDIATE STORAGE SCRATCHPAD ADDRESS 0000h TO 001Fh 0020h TO 01FFh 0200h TO 021Fh 0220h TO 023Fh 0240h TO 025Fh 0260h TO 027Fh 0280h TO 0FFFh 1000h TO 2FFFh 32-BYTE GENERAL-PURPOSE SRAM (R/W) GENERAL-PURPOSE SRAM (R/W) 32-BYTE REGISTER PAGE 1 32-BYTE REGISTER PAGE 2 GENERAL-PURPOSE SRAM (R/W) GENERAL-PURPOSE SRAM (R/W) (RESERVED FOR FUTURE EXTENSIONS) DATA-LOG MEMORY (READ ONLY) PAGE 0 PAGES 1 TO 15 PAGE 16 PAGE 17 PAGE 18 PAGE 19 PAGES 20 TO 127 PAGES 128 TO 383 Figure 5. Memory Map _______________________________________________________________________________________ 9 High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E ADDRESS 0200h 0201h 0202h 0203h 0204h 0205h 0206h 0207h 0208h 0209h 020Ah 020Bh 020Ch 020Dh 020Eh 020Fh 0210h 0211h 0212h 0213h 0214h 0215h 0216h 0217h 0218h 0 1 0 1 BOR 1 0 1 0 1 1 1 Low Byte 0 0 BIT 7 0 0 0 0 CENT 12/24 0 0 10 Years Low Byte High Byte Low Threshold High Threshold (No Function with the DS1922E) (No Function with the DS1922E) 0 0 0 0 0 High Byte (No Function with the DS1922E) (No Function with the DS1922E) 0 1 0 SUTA 1 0 0 1 0 RO 1 WFTA 0 1 0 (X) 0 MEMCLR 0 1 0 TLFS 0 0 ETHA 0 EHSS 0 THF MIP ETLA 0 EOSC ETL TLF 0 0 BIT 6 BIT 5 10 Seconds 10 Minutes 20 Hour AM/PM 10 Hour BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 FUNCTION ACCESS* Single Seconds Single Minutes Single Hours Single Date Single Months Single Years Sample Rate Temperature Alarms -- Latest Temperature -- Temperature Alarm Enable -- RTC Control Mission Control Alarm Status General Status Start Delay Counter R/W R/W R/W R R R R R R R RealTime Clock Registers 10 Date 10 Months R/W R R/W R/W R/W R/W R R R R R R R R Low Byte Center Byte High Byte R/W R *The left entry in the ACCESS column is valid between missions. The right entry shows the applicable access type while a mission is in progress. Figure 6. DS1922E Register Pages Map 10 ______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E ADDRESS 0219h 021Ah 021Bh 021Ch 021Dh 021Eh 021Fh 0220h 0221h 0222h 0223h 0224h 0225h 0226h 0227h 0228h ... 022Fh 0230h ... 0237h 0238h ... 023Fh (No Function; All These Bytes Read 00h) -- R R BIT 7 0 0 0 0 CENT 12/24 0 0 10 Years (No Function; Reads 00h) Low Byte Center Byte High Byte Low Byte Center Byte High Byte Configuration Code EPW First Byte ... Eighth Byte First Byte ... Eighth Byte 0 BIT 6 BIT 5 10 Seconds 10 Minutes 20 Hour AM/PM 10 Hour BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 FUNCTION ACCESS* Single Seconds Single Minutes Single Hours Single Date Single Months Single Years -- Mission Samples Counter Device Samples Counter Flavor PW Control Read Access Password Full Access Password R R R R Mission Timestamp 10 Date 10 Months R R R R R/W W R R R -- W -- *The left entry in the ACCESS column is valid between missions. The right entry shows the applicable access type while a mission is in progress. Figure 6. DS1922E Register Pages Map (continued) ______________________________________________________________________________________ 11 High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E Detailed Register Descriptions Timekeeping and Calendar The RTC and calendar information is accessed by reading/writing the appropriate bytes in the register page, address 0200h to 0205h. For readings to be valid, all RTC registers must be read sequentially starting at address 0200h. Some of the RTC bits are set to 0. These bits always read 0 regardless of how they are written. The number representation of the RTC registers is binary-coded decimal (BCD) format. The DS1922E's RTC can run in either 12hr or 24hr mode. Bit 6 of the Hours register (address 0202h) is defined as the 12hr or 24hr mode select bit. When high, the 12hr mode is selected. In the 12hr mode, bit 5 is the AM/PM bit with logic 1 being PM. In the 24hr mode, bit 5 is the 20hr bit (20hr to 23hr). The CENT bit, bit 7 of the Months register, can be written by the user. This bit changes its state when the years counter transitions from 99 to 00. The calendar logic is designed to automatically compensate for leap years. For every year value that is either 00 or a multiple of 4, the device adds a 29th of February. This works correctly up to (but not including) the year 2100. Sample Rate The content of the Sample Rate register (addresses 0206h, 0207h) specifies the time elapse (in seconds if EHSS = 1, or minutes if EHSS = 0) between two temperature-logging events. The sample rate can be any value from 1 to 16,383, coded as an unsigned 14-bit binary number. If EHSS = 1, the shortest time between logging events is 1s and the longest (sample rate = 3FFFh) is 4.55hr. If EHSS = 0, the shortest is 1min and the longest time is 273.05hr (sample rate = 3FFFh). The EHSS bit is located in the RTC Control register at address 0212h. It is important that the user sets the EHSS bit accordingly while setting the Sample Rate register. Writing a sample rate of 0000h results in a sample rate = 0001h, causing the DS1922E to log the temperature either every minute or every second depending upon the state of the EHSS bit. RTC Registers ADDRESS 0200h 0201h 0202h 0203h 0204h 0205h BIT 7 0 0 0 0 CENT 12/24 0 0 10 Years 0 BIT 6 BIT 5 10 Seconds 10 Minutes 20 Hour AM/PM 10 Hour BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 Single Seconds Single Minutes Single Hours Single Date Single Months Single Years 10 Date 10 Months Note: During a mission, there is only read access to these registers. Bit cells marked "0" always read 0 and cannot be written to 1. Sample Rate Register ADDRESS 0206h 0207h 0 0 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 Sample Rate Low Sample Rate High Note: During a mission, there is only read access to these registers. Bit cells marked "0" always read 0 and cannot be written to 1. 12 ______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory Temperature Conversion The DS1922E's temperature range begins at +15C and ends at +140C. Temperature values are represented as an 8- or 16-bit unsigned binary number with a resolution of 0.5C in 8-bit mode and 0.0625C in 16-bit mode. The higher temperature byte TRH is always valid. In 16-bit mode, only the three highest bits of the lower byte TRL are valid. The five lower bits all read 0. TRL is undefined if the device is in 8-bit temperature mode. An out-of-range temperature reading is indicated as 00h or 0000h when too cold and FFh or FFE0h when too hot. With TRH and TRL representing the decimal equivalent of a temperature reading, the temperature value is calculated as: (C) = TRH/2 + 14 + TRL/512 (16-bit mode, TLFS = 1, see address 0213h) (C) = TRH/2 + 14 (8-bit mode, TLFS = 0, see address 0213h) This equation is valid for converting temperature readings stored in the data-log memory as well as for data read from the Latest Temperature Conversion Result register. To specify the temperature alarm thresholds, the previous equations are resolved to: TALM = 2 x (C) - 28 Because the temperature alarm threshold is only one byte, the resolution or temperature increment is limited to 0.5C. The TALM value must be converted into hexadecimal format before it can be written to one of the Temperature Alarm Threshold registers (Low Alarm address 0208h; High Alarm address 0209h). Independent of the conversion mode (8- or 16-bit), only the most significant byte of a temperature conversion is used to determine whether an alarm is generated. DS1922E Latest Temperature Conversion Result Register ADDRESS 020Ch 020Dh BIT 7 T2 T10 BIT 6 T1 T9 BIT 5 T0 T8 BIT 4 0 T7 BIT 3 0 T6 BIT 2 0 T5 BIT 1 0 T4 BIT 0 0 T3 BYTE TRL TRH Table 1. Temperature Conversion Examples MODE 8-Bit 8-Bit 16-Bit 16-Bit TRH HEX 54h 17h 54h 17h DECIMAL 84 23 84 23 HEX -- -- 00h 60h TRL DECIMAL -- -- 0 96 (C) 56.0 25.5 56.0000 25.6875 Table 2. Temperature Alarm Threshold Examples (C) 65.5 30.0 TALM HEX 67h 20h DECIMAL 103 32 ______________________________________________________________________________________ 13 High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E Temperature Sensor Control Register ADDRESS 0210h BIT 7 0 BIT 6 0 BIT 5 0 BIT 4 0 BIT 3 0 BIT 2 0 BIT 1 ETHA BIT 0 ETLA Note: During a mission, there is only read access to this register. Bits 2 to 7 have no function. They always read 0 and cannot be written to 1. RTC Control Register ADDRESS 0212h BIT 7 0 BIT 6 0 BIT 5 0 BIT 4 0 BIT 3 0 BIT 2 0 BIT 1 EHSS BIT 0 EOSC Note: During a mission, there is only read access to this register. Bits 2 to 7 have no function. They always read 0 and cannot be written to 1. Temperature Sensor Alarm The DS1922E has two Temperature Alarm Threshold registers (address 0208h, 0209h) to store values that determine whether a critical temperature has been reached. A temperature alarm is generated if the device measures an alarming temperature and the alarm signaling is enabled. The bits ETLA and ETHA that enable the temperature alarm are located in the Temperature Sensor Control register. The temperature alarm flags TLF and THF are found in the Alarm Status register at address 0214h. Bit 1: Enable Temperature High Alarm (ETHA). This bit controls whether, during a mission, the temperature high alarm flag (THF) may be set, if a temperature conversion results in a value equal to or higher than the value in the Temperature High Alarm Threshold register. If ETHA is 1, temperature high alarms are enabled. If ETHA is 0, temperature high alarms are not generated. Bit 0: Enable Temperature Low Alarm (ETLA). This bit controls whether, during a mission, the temperature low alarm flag (TLF) may be set, if a temperature conversion results in a value equal to or lower than the value in the Temperature Low Alarm Threshold register. If ETLA is 1, temperature low alarms are enabled. If ETLA is 0, temperature low alarms are not generated. RTC Control To minimize the power consumption of a DS1922E, the RTC oscillator should be turned off when the device is not in use. The oscillator on/off bit is located in the RTC Control register. This register also includes the EHSS bit, which determines whether the sample rate is specified in seconds or minutes. Bit 1: Enable High-Speed Sample (EHSS). This bit controls the speed of the sample rate counter. When set to logic 0, the sample rate is specified in minutes. When set to logic 1, the sample rate is specified in seconds. Bit 0: Enable Oscillator (EOSC). This bit controls the crystal oscillator of the RTC. When set to logic 1, the oscillator starts. When written to logic 0, the oscillator stops and the device is in a low-power data-retention mode. This bit must be 1 for normal operation. A Forced Conversion or Start Mission command automatically starts the RTC by changing the EOSC bit to logic 1. 14 ______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory Mission Control Register ADDRESS 0213h BIT 7 1 BIT 6 1 BIT 5 SUTA BIT 4 RO BIT 3 (X) BIT 2 TLFS BIT 1 0 BIT 0 ETL DS1922E Note: During a mission, there is only read access to this register. Bits 6 and 7 have no function. They always read 1 and cannot be written to 0. Bits 1 and 3 control functions that are not available with the DS1922E. Bit 1 must be set to 0. Under this condition the setting of bit 3 becomes a "don't care." Mission Control The DS1922E is set up for its operation by writing appropriate data to its special function registers, which are located in the two register pages. The settings in the Mission Control register determine which format (8 or 16 bits) applies and whether old data can be overwritten by new data once the data-log memory is full. An additional control bit can be set to tell the DS1922E to wait with logging data until a temperature alarm is encountered. Bit 5: Start Mission Upon Temperature Alarm (SUTA). This bit specifies whether a mission begins immediately (includes delayed start) or if a temperature alarm is required to start the mission. If this bit is 1, the device performs an 8-bit temperature conversion at the selected sample rate and begins with data logging only if an alarming temperature (high alarm or low alarm) was found. The first logged temperature is when the alarm occurred. However, the mission sample counter does not increment. This functionality is guaranteed by design and not production tested. Bit 4: Rollover Control (RO). This bit controls whether, during a mission, the data-log memory is overwritten with new data or whether data logging is stopped once the data-log memory is full. Setting this bit to 1 enables the rollover and data logging continues at the beginning, overwriting previously collected data. If this bit is 0, the logging and conversions stop once the data-log memory is full. However, the RTC continues to run and the MIP bit remains set until the Stop Mission command is performed. Bit 2: Temperature Logging Format Selection (TLFS). This bit specifies the format used to store temperature readings in the data-log memory. If this bit is 0, the data is stored in 8-bit format. If this bit is 1, the 16-bit format is used (higher resolution). With 16-bit format, the most significant byte is stored at the lower address. Bit 0: Enable Temperature Logging (ETL). To set up the device for a temperature-logging mission, this bit must be set to logic 1. The recorded temperature values start at address 1000h. ______________________________________________________________________________________ 15 High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E Alarm Status Register ADDRESS 0214h BIT 7 BOR BIT 6 1 BIT 5 1 BIT 4 1 BIT 3 0 BIT 2 0 BIT 1 THF BIT 0 TLF Note: There is only read access to this register. Bits 4 to 6 have no function. They always read 1. Bits 2 and 3 have no function with the DS1922E. They always read 0. The alarm status bits are cleared simultaneously when the Clear Memory Function is invoked. See memory and control functions for details. General Status Register ADDRESS 0215h BIT 7 1 BIT 6 1 BIT 5 0 BIT 4 WFTA BIT 3 MEMCLR BIT 2 0 BIT 1 MIP BIT 0 0 Note: There is only read access to this register. Bits 0, 2, 5, 6, and 7 have no function. Alarm Status The fastest way to determine whether a programmed temperature threshold was exceeded during a mission is through reading the Alarm Status register. In a networked environment that contains multiple DS1922E iButtons, the devices that encountered an alarm can quickly be identified by means of the Conditional Search command (see the 1-Wire ROM Function Commands section). The temperature alarm only occurs if enabled (see the Temperature Sensor Alarm section). The BOR alarm is always enabled. Bit 7: Battery-On Reset Alarm (BOR). If this bit reads 1, the device has performed a power-on reset. This indicates that the device has experienced a shock big enough to interrupt the internal battery power supply. The device may still appear functional, but it has lost its factory calibration. Any data found in the data-log memory should be disregarded. Bit 1: Temperature High Alarm Flag (THF). If this bit reads 1, there was at least one temperature conversion during a mission revealing a temperature equal to or higher than the value in the Temperature High Alarm register. A forced conversion can affect the THF bit. This bit can also be set with the initial alarm in the SUTA = 1 mode. Bit 0: Temperature Low Alarm Flag (TLF). If this bit reads 1, there was at least one temperature conversion during a mission revealing a temperature equal to or lower than the value in the Temperature Low Alarm register. A forced conversion can affect the TLF bit. This bit can also be set with the initial alarm in the SUTA = 1 mode. General Status The information in the General Status register tells the host computer whether a mission-related command was executed successfully. Individual status bits indicate whether the DS1922E is performing a mission, waiting for a temperature alarm to trigger the logging of data or whether the data from the latest mission has been cleared. Bit 4: Waiting for Temperature Alarm (WFTA). If this bit reads 1, the Mission Start Upon Temperature Alarm was selected and the Start Mission command was successfully executed, but the device has not yet experienced the temperature alarm. This bit is cleared after a temperature alarm event, but is not affected by the Clear Memory command. Once set, WFTA remains set if a mission is stopped before a temperature alarm occurs. To clear WFTA manually before starting a new mission, set the high temperature alarm (address 0209h) to +15C and perform a forced conversion. Bit 3: Memory Cleared (MEMCLR). If this bit reads 1, the Mission Timestamp, mission samples counter, and all the alarm flags of the Alarm Status register have been cleared in preparation of a new mission. Executing the Clear Memory command clears these memory sections. The MEMCLR bit returns to 0 as soon as a new mission is started by using the Start Mission command. The memory must be cleared for a mission to start. Bit 1: Mission in Progress (MIP). If this bit reads 1, the device has been set up for a mission and this mission is still in progress. The MIP bit returns from logic 1 to logic 0 when a mission is ended. See the Start Mission and Stop Mission function commands. 16 ______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory Mission Start Delay Counter Register ADDRESS 0216h 0217h 0218h BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 Delay Low Byte Delay Center Byte Delay High Byte DS1922E Note: During a mission, there is only read access to this register. Mission Timestamp Register ADDRESS 0219h 021Ah 021Bh 021Ch 021Dh 021Eh BIT 7 0 0 0 0 CENT 12/24 0 0 10 Years 0 BIT 6 BIT 5 10 Seconds 10 Minutes 20 Hours AM/PM 10 Hours BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 Single Seconds Single Minutes Single Hours Single Date Single Months Single Years 10 Date 10 Months Note: There is only read access to this register. Mission Samples Counter Register ADDRESS 0220h 0221h 0222h Note: There is only read access to this register. BIT 7 BIT 6 BIT 5 BIT 4 Low Byte Center Byte High Byte BIT 3 BIT 2 BIT 1 BIT 0 Mission Start Delay The content of the Mission Start Delay Counter register tells how many minutes must expire from the time a mission was started until the first measurement of the mission takes place (SUTA = 0) or until the device starts testing the temperature for a temperature alarm (SUTA = 1). The Mission Start Delay is stored as an unsigned 24-bit integer number. The maximum delay is 16,777,215min, equivalent to 11,650 days or roughly 31yr. If the start delay is nonzero and the SUTA bit is set to 1, first the delay must expire before the device starts testing for temperature alarms to begin logging data. For a typical mission, the Mission Start Delay is 0. If a mission is too long for a single DS1922E to store all readings at the selected sample rate, one can use several devices and set the Mission Start Delay for the second device to start recording as soon as the memory of the first device is full, and so on. The RO bit in the Mission Control register (address 0213h) must be set to 0 to prevent overwriting of collected data once the data-log memory is full. Mission Timestamp The Mission Timestamp register indicates the date and time of the first temperature sample of the mission. There is only read access to the Mission Timestamp register. Mission Progress Indicator Depending on settings in the Mission Control register (address 0213h), the DS1922E logs temperature in 8-bit or 16-bit format. The Mission Samples Counter together with the starting address and the logging format (8 or 16 bits) provide the information to identify valid blocks of data that have been gathered during the current (MIP = 1) or latest mission (MIP = 0). See the Data-Log Memory Usage section for an illustration. The number read from the mission samples counter indicates how often the DS1922E woke up during a mission to measure temperature. The number format is 24-bit unsigned integer. The mission samples counter is reset through the Clear Memory command. ______________________________________________________________________________________ 17 High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E Device Samples Counter Register ADDRESS 0223h 0224h 0225h BIT 7 BIT 6 BIT 5 BIT 4 Low Byte Center Byte High Byte BIT 3 BIT 2 BIT 1 BIT 0 Note: There is only read access to this register. Device Configuration Register ADDRESS BIT 7 0 0 0226h 0 0 1 BIT 6 0 0 1 1 0 BIT 5 0 1 0 1 0 BIT 4 0 0 0 0 0 BIT 3 0 0 0 0 0 BIT 2 0 0 0 0 0 BIT 1 0 0 0 0 0 BIT 0 0 0 0 0 0 PART DS2422 DS1923 DS1922L DS1922T DS1922E Note: There is only read access to this register. Password Control Register ADDRESS 0227h BIT 7 BIT 6 BIT 5 BIT 4 EPW BIT 3 BIT 2 BIT 1 BIT 0 Note: During a mission, there is only read access to this register. Other Indicators The Device Samples Counter register is similar to the Mission Samples Counter register. During a mission this counter increments whenever the DS1922E wakes up to measure and log data and when the device is testing for a temperature alarm in SUTA mode. Between missions the counter increments whenever the Forced Conversion command is executed. This way the Device Samples Counter register functions like a gas gauge for the battery that powers the iButton. The Device Samples Counter register is reset to zero when the iButton is assembled. The number format is 24-bit unsigned integer. The maximum number that can be represented in this format is 16,777,215. Due to the calibration and tests at the factory, new devices can have a count value of up to 35,000. The typical value is well below 10,000. The code in the Device Configuration register allows the master to distinguish between the DS2422 chip and different versions of the DS1922 iButtons. The Device Configuration Register table shows the codes assigned to the various devices. Security by Password The DS1922E is designed to use two passwords that control read access and full access. Reading from or writing to the scratchpad as well as the forced conversion command does not require a password. The password must be transmitted immediately after the command code of the memory or control function. If password checking is enabled, the password transmitted is compared to the passwords stored in the device. The data pattern stored in the Password Control register determines whether password checking is enabled. To enable password checking, the EPW bits need to form a binary pattern of 10101010 (AAh). The default pattern of EPW is different from AAh. If the EPW pattern is different from AAh, any pattern is accepted as long as it has a length of exactly 64 bits. Once enabled, changing the passwords and disabling password checking requires the knowledge of the current fullaccess password. 18 ______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory Read Access Password Register ADDRESS 0228h 0229h ... 022Eh 022Fh RP55 RP63 RP54 RP62 RP53 RP61 RP52 RP60 BIT 7 RP7 RP15 BIT 6 RP6 RP14 BIT 5 RP5 RP13 BIT 4 RP4 RP12 ... RP51 RP59 RP50 RP58 RP49 RP57 RP48 RP56 BIT 3 RP3 RP11 BIT 2 RP2 RP10 BIT 1 RP1 RP9 BIT 0 RP0 RP8 DS1922E Note: There is only write access to this register. Attempting to read the password reports all zeros. The password cannot be changed while a mission is in progress. Full Access Password Register ADDRESS 0230h 0231h ... 0236h 0237h FP55 FP63 FP54 FP62 FP53 FP61 FP52 FP60 BIT 7 FP7 FP15 BIT 6 FP6 FP14 BIT 5 FP5 FP13 BIT 4 FP4 FP12 ... FP51 FP59 FP50 FP58 FP49 FP57 FP48 FP56 BIT 3 FP3 FP11 BIT 2 FP2 FP10 BIT 1 FP1 FP9 BIT 0 FP0 FP8 Note: There is only write access to this register. Attempting to read the password reports all zeros. The password cannot be changed while a mission is in progress. Before enabling password checking, passwords for read-only access as well as for full access (read/write/control) must be written to the password registers. Setting up a password or enabling/disabling the password checking is done in the same way as writing data to a memory location; only the address is different. Since they are located in the same memory page, both passwords can be redefined at the same time. The Read Access Password must be transmitted exactly in the sequence RP0, RP1...RP62, RP63. This password only applies to the Read Memory with CRC function. The DS1922E delivers the requested data only if the password transmitted by the master was correct or if password checking is not enabled. The Full Access Password must be transmitted exactly in the sequence FP0, FP1...FP62, FP63. It affects the functions Read Memory with CRC, Copy Scratchpad, Clear Memory, Start Mission, and Stop Mission. The DS1922E executes the command only if the password transmitted by the master was correct or if password checking is not enabled. Due to the special behavior of the write-access logic, the Password Control register and both passwords must be written at the same time. When setting up new passwords, always verify (read back) the scratchpad before sending the Copy Scratchpad command. After a new password is successfully copied from the scratchpad to its memory location, erase the scratchpad by filling it with new data (Write Scratchpad command). Otherwise, a copy of the passwords remains in the scratchpad for public read access. ______________________________________________________________________________________ 19 High-Temperature Logger iButton with 8KB Data-Log Memory ETL = 1 TLFS = 0 1000h ETL = 1 TLFS = 1 1000h WITH 16-BIT FORMAT, THE MOST SIGNIFICANT BYTE IS STORED AT THE LOWER ADDRESS. 8192 8-BIT ENTRIES 4096 16-BIT ENTRIES 2FFFh 2FFFh Figure 7. Temperature Logging Data-Log Memory Usage Once set up for a mission, the DS1922E logs the temperature measurements at equidistant time points entry after entry in its data-log memory. The data-log memory can store 8192 entries in 8-bit format or 4096 entries in 16-bit format (Figure 7). In 16-bit format, the higher 8 bits of an entry are stored at the lower address. Knowing the starting time point (Mission Timestamp) and the interval between temperature measurements, one can reconstruct the time and date of each measurement. There are two alternatives to the way the DS1922E behaves after the data-log memory is filled with data. The user can program the device to either stop any further recording (disable rollover) or overwrite the previously recorded data (enable rollover), one entry at a time, starting again at the beginning of the respective memory section. The contents of the Mission Samples Counter in conjunction with the sample rate and the Mission Timestamp allow reconstructing the time points of all values stored in the data-log memory. This gives the exact history over time for the most recent measurements taken. Earlier measurements cannot be reconstructed. Missioning The typical task of the DS1922E iButton is recording temperature. Before the device can perform this function, it needs to be set up properly. This procedure is called missioning. First, the DS1922E must have its RTC set to a valid time and date. This reference time can be the local time, or, when used inside of a mobile unit, UTC (also called GMT, Greenwich Mean Time), or any other time standard that was agreed upon. The RTC oscillator must be running (EOSC = 1). The memory assigned to store the mission timestamp, mission samples counter, and alarm flags must be cleared using the Memory Clear command. To enable the device for a mission, the ETL bit must be set to 1. These are general settings that must be made in any case, regardless of the type of object to be monitored and the duration of the mission. If alarm signaling is desired, the temperature alarm low and high thresholds must be defined. See the Temperature Conversion section for how to convert a temperature value into the binary code to be written to the threshold registers. In addition, the temperature alarm must be enabled for the low and/or high threshold. This makes the device respond to a Conditional Search command (see the1-Wire ROM Function Commands section), provided that an alarming condition has been encountered. The setting of the RO bit (rollover enable) and sample rate depends on the duration of the mission and the monitoring requirements. If the most recently logged data is important, the rollover should be enabled (RO = 1). Otherwise, one should estimate the duration of the mission in minutes and divide the number by 8192 (8-bit format) or 4096 (16-bit format) to calculate the value of the sample rate (number of minutes between conversions). For example, if the estimated duration of a mission is 10 days (= 14400min), the 8192-byte capacity of the data-log memory would be sufficient to store a new 8-bit value every 1.8min (110s). If the DS1922E's data-log memory is not large enough to store all readings, one can use several devices and set the mission start delay to values that make the second device start logging as soon as the memory of the first device is full, and so on. The RO bit must be set to 0 to disable rollover that would otherwise overwrite the logged data. After the RO bit and the mission start delay are set, the sample rate must be written to the Sample Rate register. The sample rate can be any value from 1 to 16,383, coded as an unsigned 14-bit binary number. The fastest sample rate is one sample per second (EHSS = 1, sample rate = 0001h) and the slowest is one sample every 273.05hr (EHSS = 0, sample rate = 3FFFh). To get one sample every 6min, for example, the sample rate value must be set to 6 (EHSS = 0) or 360 decimal (equivalent to 0168h at EHSS = 1). If there is a risk of unauthorized access to the DS1922E or manipulation of data, one should define passwords for read access and full access. Before the passwords become effective, their use must be enabled. See the Security by Password section for more details. DS1922E 20 ______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory The last step to begin a mission is to issue the Start Mission command. As soon as it has received this command, the DS1922E sets the MIP flag and clears the MEMCLR flag. With the Immediate/Delayed Start Mode (SUTA = 0), after as many minutes as specified by the mission start delay are over, the device wakes up, copies the current date and time to the Mission Timestamp register, and logs the first entry of the mission. This increments both the mission samples counter and device samples counter. All subsequent log entries are made as specified by the value in the Sample Rate register and the EHSS bit. If the Start Upon Temperature Alarm mode is chosen (SUTA = 1) and temperature logging is enabled (ETL = 1), the DS1922E first waits until the start delay is over. Then the device wakes up in intervals as specified by the sample rate and EHSS bit and measures the temperature. This increments the Device Samples Counter register only. The first sample of the mission is logged when the temperature alarm occurred. However, the Mission Sample Counter does not increment. One sample period later the Mission Timestamp register is set. From then on, both the Mission Samples Counter and Device Samples Counter registers increment at the same time. All subsequent log entries are made as specified by the value in the Sample Rate register and the EHSS bit. The general-purpose memory operates independently of the other memory sections and is not write protected during a mission. All the DS1922E's memory can be read at any time, e.g., to watch the progress of a mission. Attempts to read the passwords read 00h bytes instead of the data that is stored in the password registers. DS1922E Memory Access Address Registers and Transfer Status Because of the serial data transfer, the DS1922E employs three address registers called TA1, TA2, and E/S (Figure 8). Registers TA1 and TA2 must be loaded with the target address to which the data is written or from which data is sent to the master upon a Read command. Register E/S acts like a byte counter and transfer status register. It is used to verify data integrity with Write commands. Therefore, the master only has read access to this register. The lower 5 bits of the E/S register indicate the address of the last byte that has been written to the scratchpad. This address is called ending offset. The DS1922E requires that the ending offset is always 1Fh for a Copy Scratchpad to function. Bit 5 of the E/S register, called PF or partial byte flag, is set if the number of data bits sent by the master is not an integer multiple of 8. Bit 6 is always a 0. Note that the lowest 5 bits of the target address also determine the address within the scratchpad, where intermediate storage of data begins. This address is called byte offset. If the target address for a Write command is 13Ch, for example, the scratchpad stores incoming data beginning at the byte offset 1Ch and is full after only 4 bytes. The corresponding ending offset in this example is 1Fh. For best economy of speed and BIT NUMBER TARGET ADDRESS (TA1) 7 T7 6 T6 5 T5 4 T4 3 T3 2 T2 1 T1 0 T0 TARGET ADDRESS (TA2) T15 T14 T13 T12 T11 T10 T9 T8 ENDING ADDRESS WITH DATA STATUS (E/S) (READ ONLY) AA 0 PF E4 E3 E2 E1 E0 Figure 8. Address Registers ______________________________________________________________________________________ 21 High-Temperature Logger iButton with 8KB Data-Log Memory efficiency, the target address for writing should point to the beginning of a page, i.e., the byte offset is 0. Thus, the full 32-byte capacity of the scratchpad is available, resulting also in the ending offset of 1Fh. The ending offset together with the PF flag are a means to support the master checking the data integrity after a Write command. The highest valued bit of the E/S register, called authorization accepted (AA), indicates that a valid Copy command for the scratchpad has been received and executed. Writing data to the scratchpad clears this flag. DS1922E Memory and Control Function Commands Figure 9 shows the protocols necessary for accessing the memory and the special function registers of the DS1922E. An example on how to use these and other functions to set up the DS1922E for a mission is included in the Mission Example: Prepare and Start a New Mission section. The communication between the master and the DS1922E takes place either at standard speed (default, OD = 0) or at overdrive speed (OD = 1). If not explicitly set into the Overdrive Mode the DS1922E assumes standard speed. Internal memory access during a mission has priority over external access through the 1-Wire interface. This affects several commands in this section. See the Memory Access Conflicts section for details and solutions. Writing with Verification To write data to the DS1922E, the scratchpad must be used as intermediate storage. First, the master issues the Write Scratchpad command to specify the desired target address, followed by the data to be written to the scratchpad. In the next step, the master sends the Read Scratchpad command to read the scratchpad and to verify data integrity. As preamble to the scratchpad data, the DS1922E sends the requested target address TA1 and TA2 and the contents of the E/S Register. If the PF flag is set, data did not arrive correctly in the scratchpad. The master does not need to continue reading; it can start a new trial to write data to the scratchpad. Similarly, a set AA flag indicates that the Write command was not recognized by the device. If everything went correctly, both flags are cleared and the ending offset indicates the address of the last byte written to the scratchpad. Now the master can continue verifying every data bit. After the master has verified the data, it must send the Copy Scratchpad command. This command must be followed exactly by the data of the three address registers TA1, TA2, and E/S, as the master has read them verifying the scratchpad. As soon as the DS1922E has received these bytes, it copies the data to the requested location beginning at the target address. Write Scratchpad Command [0Fh] After issuing the Write Scratchpad command, the master must first provide the 2-byte target address, followed by the data to be written to the scratchpad. The data is written to the scratchpad starting at the byte offset T[4:0]. The master must send as many bytes as are needed to reach the ending offset of 1Fh. If a data byte is incomplete, its content is ignored and the partial byte flag PF is set. When executing the Write Scratchpad command, the CRC generator inside the DS1922E calculates a CRC of the entire data stream, starting at the command code and ending at the last data byte sent by the master (Figure 15). This CRC is generated using the CRC-16 polynomial by first clearing the CRC generator and then shifting in the command code (0Fh) of the Write Scratchpad command, the target addresses TA1 and TA2 as supplied by the master, and all the data bytes. If the ending offset is 11111b, the master can send 16 read time slots and receive the inverted CRC-16 generated by the DS1922E. Note that both register pages are write protected during a mission. Although the Write Scratchpad command works normally at any time, the subsequent copy scratchpad to a register page fails during a mission. 22 ______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory Read Scratchpad Command [AAh] This command is used to verify scratchpad data and target address. After issuing the Read Scratchpad command, the master begins reading. The first 2 bytes are the target address. The next byte is the ending offset/data status byte (E/S) followed by the scratchpad data beginning at the byte offset T[4:0], as shown in Figure 8. The master can continue reading data until the end of the scratchpad after which it receives an inverted CRC-16 of the command code, target addresses TA1 and TA2, the E/S byte, and the scratchpad data starting at the target address. After the CRC is read, the bus master reads logic 1s from the DS1922E until a reset pulse is issued. progress, write attempts to the register pages are not successful. The AA bit remaining at 0 indicates this. DS1922E Read Memory with Password and CRC [69h] The Read Memory with CRC command is the general function to read from the device. This command generates and transmits a 16-bit CRC following the last data byte of a memory page. After having sent the command code of the Read Memory with CRC command, the bus master sends a 2-byte address that indicates a starting byte location. Next, the master must transmit one of the 64-bit passwords. If passwords are enabled and the transmitted password does not match one of the stored passwords, the Read Memory with Password and CRC command fails. The device stops communicating and waits for a reset pulse. If the password was correct or if passwords were not enabled, the master reads data from the DS1922E beginning from the starting address and continuing until the end of a 32-byte page is reached. At that point the bus master sends 16 additional read data time slots and receives the inverted 16-bit CRC. With subsequent read data time slots the master receives data starting at the beginning of the next memory page followed again by the CRC for that page. This sequence continues until the bus master resets the device. When trying to read the passwords or memory areas that are marked as "reserved," the DS1922E transmits 00h or FFh bytes, respectively. The CRC at the end of a 32-byte memory page is based on the data as it was transmitted. With the initial pass through the Read Memory with CRC flow, the 16-bit CRC value is the result of shifting the command byte into the cleared CRC generator followed by the two address bytes and the contents of the data memory. Subsequent passes through the Read Memory with CRC flow generate a 16-bit CRC that is the result of clearing the CRC generator and then shifting in the contents of the data memory page. After the 16-bit CRC of the last page is read, the bus master receives logic 1s from the DS1922E until a reset pulse is issued. The Read Memory with CRC command sequence can be ended at any point by issuing a reset pulse. Copy Scratchpad with Password [99h] This command is used to copy data from the scratchpad to the writable memory sections. After issuing the Copy Scratchpad command, the master must provide a 3-byte authorization pattern, which can be obtained by reading the scratchpad for verification. This pattern must exactly match the data contained in the three address registers (TA1, TA2, E/S, in that order). Next, the master must transmit the 64-bit full-access password. If passwords are enabled and the transmitted password is different from the stored full-access password, the Copy Scratchpad with Password command fails. The device stops communicating and waits for a reset pulse. If the password was correct or if passwords were not enabled, the device tests the 3-byte authorization code. If the authorization code pattern matches, the AA flag is set and the copy begins. A pattern of alternating 1s and 0s is transmitted after the data has been copied until the master issues a reset pulse. While the copy is in progress, any attempt to reset the part is ignored. Copy typically takes 2s per byte. The data to be copied is determined by the three address registers. The scratchpad data from the beginning offset through the ending offset are copied, starting at the target address. The AA flag remains at logic 1 until it is cleared by the next Write Scratchpad command. With suitable password, the copy scratchpad always functions for the 16 pages of data memory and the 2 pages of calibration memory. While a mission is in ______________________________________________________________________________________ 23 High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E MASTER Tx MEMORY OR CONTROL FUNCTION COMMAND FROM ROM FUNCTIONS FLOWCHART (FIGURE 11) 0Fh WRITE SCRATCHPAD? Y MASTER Tx TA1 [T7:T0] N AAh READ SCRATCHPAD? Y MASTER Rx TA1 [T7:T0] N 99h COPY SCRATCHPAD [WITH PW] Y MASTER Tx TA1 [T7:T0], TA2 [T15:T8] N TO FIGURE 9b AUTHORIZATION CODE MASTER Tx TA2 [T15:T8] MASTER Rx TA2 [T15:T8] MASTER Tx E/S BYTE DS1922E SETS SCRATCHPAD OFFSET = [T4:T0] AND CLEARS (PF, AA) MASTER Rx ENDING OFFSET WITH DATA STATUS (E/S) MASTER Tx 64 BITS [PASSWORD] MASTER Tx DATA BYTE TO SCRATCHPAD OFFSET DS1922E SETS SCRATCHPAD OFFSET = [T4:T0] PASSWORD ACCEPTED? Y N DS1922E INCREMENTS SCRATCHPAD OFFSET DS1922E SETS [E4:E0] = SCRATCHPAD OFFSET DS1922E INCREMENTS SCRATCHPAD OFFSET Y MASTER Rx DATA BYTE FROM SCRATCHPAD OFFSET AUTHORIZATION CODE MATCH? Y AA = 1 N MASTER Tx RESET? N MASTER Tx RESET? N Y N SCRATCHPAD OFFSET = 11111b? Y PARTIAL BYTE WRITTEN? N Y N SCRATCHPAD OFFSET = 11111b? Y MASTER Rx CRC-16 OF COMMAND, ADDRESS DATA, E/S BYTE, AND DATA STARTING AT THE TARGET ADDRESS MASTER Rx "1"s N DS1922E COPIES SCRATCHPAD DATA TO MEMORY MASTER Rx "1"s COPYING FINISHED Y DS1922E Tx "0" MASTER Tx RESET? Y N Y MASTER Tx RESET? N PF = 1 MASTER Rx CRC-16 OF COMMAND, ADDRESS DATA Y MASTER Tx RESET? N Y MASTER Tx RESET? N MASTER Rx "1"s N MASTER Rx "1"s MASTER Tx RESET? N DS1922E Tx "1" Y MASTER Tx RESET? Y FROM FIGURE 9b TO ROM FUNCTIONS FLOWCHART (FIGURE 11) Figure 9a. Memory/Control Function Flowchart 24 ______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E FROM FIGURE 9a 69h READ MEMORY [WITH PW] AND CRC Y MASTER Tx TA1 [T7:T0], TA2 [T15:T8] N 96h CLEAR MEMORY [WITH PW] Y MASTER Tx 64 BITS [PASSWORD] N 55h FORCED CONVERSION? Y MASTER Tx FFh DUMMY BYTE N TO FIGURE 9c DECISION MADE BY DS1922E MASTER Tx 64 BITS [PASSWORD] MASTER Tx FFh DUMMY BYTE MISSION IN PROGRESS? N Y PASSWORD ACCEPTED? DECISION MADE BY MASTER Y DS1922E SETS MEMORY ADDRESS = [T15:T0] N PASSWORD ACCEPTED? Y N DS1922E PERFORMS A TEMPERATURE CONVERSION MISSION IN PROGRESS? N Y DS1922E COPIES RESULT TO ADDRESS 020C/Dh MASTER Rx DATA BYTE FROM MEMORY ADDRESS N DS1922E CLEARS MISSION TIMESTAMP, MISSION SAMPLES COUNTER, ALARM FLAGS MASTER Tx RESET? Y Y MASTER Tx RESET? N DS1922E INCREMENTS ADDRESS COUNTER DS1922E SETS MEMCLR = 1 N N MASTER Tx RESET? Y END OF PAGE? Y MASTER Rx CRC-16 OF COMMAND, ADDRESS, DATA (1ST PASS); CRC-16 OF DATA (SUBSEQUENT PASSES) MASTER Tx RESET N CRC OK? Y END OF MEMORY? Y N MASTER Rx "1"s MASTER Tx RESET? Y TO FIGURE 9a FROM FIGURE 9c N Figure 9b. Memory/Control Function Flowchart (continued) ______________________________________________________________________________________ 25 High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E FROM FIGURE 9b CCh START MISSION [WITH PW] Y MASTER Tx 64 BITS [PASSWORD] N MISSION START DELAY PROCESS 33h STOP MISSION [WITH PW] Y MASTER Tx 64 BITS [PASSWORD] START DELAY COUNTER = 0? Y MASTER Tx FFh DUMMY BYTE N MASTER Tx FFh DUMMY BYTE N DS1922E WAITS FOR 1 MINUTE N PASSWORD ACCEPTED? Y DS1922E DECREMENTS START DELAY COUNTER PASSWORD ACCEPTED? Y N Y MISSION IN PROGRESS? N SUTA = 1? Y DS1922E SETS WFTA = 1 N MISSION IN PROGRESS? Y DS1922E SETS MIP = 0, WFTA = 0 N N MEMCLR = 1? Y DS1922E SETS MIP = 1, MEMCLR = 0 DS1922E WAITS ONE SAMPLE PERIOD Y MIP = 0? N MASTER Tx RESET? Y N DS1922E INITIATES MISSION START DELAY PROCESS DS1922E PERFORMS 8-BIT TEMPERATURE CONVERSION N MASTER Tx RESET? Y TEMPERATURE ALARM? Y DS1922E SETS WFTA = 0 N DS1922E WAITS ONE SAMPLE PERIOD DS1922E COPIES RTC DATA TO MISSION TIMESTAMP REGISTER DS1922E STARTS LOGGING TAKING FIRST SAMPLE END OF PROCESS TO FIGURE 9b Figure 9c. Memory/Control Function Flowchart (continued) 26 ______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory Clear Memory with Password [96h] The Clear Memory with Password command is used to prepare the device for another mission. This command is only executed if no mission is in progress. After the command code the master must transmit the 64-bit fullaccess password followed by an FFh dummy byte. If passwords are enabled and the transmitted password is different from the stored full-access password or a mission is in progress, the Clear Memory with Password command fails. The device stops communicating and waits for a reset pulse. If the password was correct or if passwords were not enabled, the device clears the Mission Timestamp register, Mission Samples Counter register, and all alarm flags of the Alarm Status register. After these cells are cleared, the MEMCLR bit of the General Status register reads 1 to indicate the successful execution of the Clear Memory with Password command. Clearing of the data-log memory is not necessary because the mission samples counter indicates how many entries in the data-log memory are valid. Start Mission with Password [CCh] The DS1922E uses a control function command to start a mission. A new mission can only be started if the previous mission has been ended and the memory has been cleared. After the command code, the master must transmit the 64-bit full-access password followed by an FFh dummy byte. If passwords are enabled and the transmitted password is different from the stored full-access password or a mission is in progress, the Start Mission with Password command fails. The device stops communicating and waits for a reset pulse. If the password was correct or if passwords were not enabled, the device starts a mission. If SUTA = 0, the sampling begins as soon as the mission start delay is over. If SUTA = 1, the first sample is written to the datalog memory at the time the temperature alarm occurred. However, the mission sample counter does not increment. One sample period later, the Mission Timestamp register is set and the regular sampling and logging begins. While the device is waiting for a temperature alarm to occur, the WFTA flag in the General Status register reads 1. During a mission there is only read access to the register pages. DS1922E Forced Conversion [55h] The Forced Conversion command can be used to measure the temperature without starting a mission. After the command code, the master must send one FFh byte to get the conversion started. The conversion result is found as a 16-bit value in the Latest Temperature Conversion Result register. This command is only executed if no mission is in progress (MIP = 0). It cannot be interrupted and takes maximum 600ms to complete. During this time memory access through the 1-Wire interface is blocked. The device behaves the same way as during a mission when the sampling interferes with a memory/control function command. See the Memory Access Conflicts section for details. Stop Mission with Password [33h] The DS1922E uses a control function command to stop a mission. Only a mission that is in progress can be stopped. After the command code, the master must transmit the 64-bit full-access password followed by a FFh dummy byte. If passwords are enabled and the transmitted password is different from the stored fullaccess password or a mission is not in progress, the Stop Mission with Password command fails. The device stops communicating and waits for a reset pulse. If the password was correct or if passwords were not enabled, the device clears the MIP bit in the General Status register and restores write access to the register pages. The WFTA bit is not cleared. See the description of the General Status register for a method to clear the WFTA bit. ______________________________________________________________________________________ 27 High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E Memory Access Conflicts While a mission is in progress or while the device is waiting for a temperature alarm to start a mission, periodically a temperature sample is taken and logged. This "internal activity" has priority over 1-Wire communication. As a consequence, device-specific commands (excluding ROM function commands and 1-Wire reset) do not perform properly when internal and "external" activities interfere with each other. Not affected are the commands Start Mission, Forced Conversion, and Clear Memory, because they are not applicable while a mission is in progress or while the device is waiting for a temperature alarm. Table 3 explains how the remaining five commands are affected by internal activity, how to detect this interference, and how to work around it. The interference is more likely to be seen with a highsample rate (one sample every second) and with highresolution logging, which can last up to 600ms. With lower sample rates, interference may hardly be visible at all. In any case, when writing driver software it is important to know about the possibility of interference and to take measures to work around it. Table 3. Memory Access Conflicts and Solutions COMMAND INDICATION OF INTERFERENCE SOLUTION Wait 0.5s, 1-Wire reset, address the device, repeat Write Scratchpad with the same data, and check the validity of the CRC-16 at the end of the command flow. Alternatively, use Read Scratchpad to verify data integrity. Wait 0.5s, 1-Wire reset, address the device, repeat Read Scratchpad, and check the validity of the CRC-16 at the end of the command flow. Wait 0.5s, 1-Wire reset, address the device, issue Read Scratchpad, and check the AA bit of the E/S byte. If the AA bit is set, Copy Scratchpad was successful. Wait 0.5s, 1-Wire reset, address the device, repeat Read Memory with CRC, and check the validity of the CRC-16 at the end of the memory page. Wait 0.5s, 1-Wire reset, address the device, and repeat Stop Mission. Perform a 1-Wire reset, address the device, read the General Status register at address 0215h, and check the MIP bit. If the MIP bit is 0, Stop Mission was successful. Write Scratchpad The CRC-16 at the end of the command flow reads FFFFh. Read Scratchpad The data read changes to FFh bytes or all bytes received are FFh, including the CRC at the end of the command flow. The device behaves as if the authorization code or password was not valid, or as if the copy function would not end. Copy Scratchpad The data read changes to all FFh bytes or all bytes Read Memory with received are FFh, including the CRC at the end of CRC the command flow, despite a valid password. Stop Mission The General Status register at address 0215h reads FFh or the MIP bit is 1 while bits 0, 2, and 5 are 0. 28 ______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory 1-Wire Bus System The 1-Wire bus is a system that has a single bus master and one or more slaves. In all instances the DS1922E is a slave device. The bus master is typically a microcontroller. The discussion of this bus system is broken down into three topics: hardware configuration, transaction sequence, and 1-Wire signaling (signal types and timing). The 1-Wire protocol defines bus transactions in terms of the bus state during specific time slots that are initiated on the falling edge of sync pulses from the bus master. The value of the pullup resistor primarily depends on the network size and load conditions. The DS1922E requires a pullup resistor of maximum 2.2k at any speed. The idle state for the 1-Wire bus is high. If for any reason a transaction needs to be suspended, the bus must be left in the idle state if the transaction is to resume. If this does not occur and the bus is left low for more than 16s (overdrive speed) or more than 120s (standard speed), one or more devices on the bus may be reset. Note that the DS1922E does not quite meet the full 16s maximum low time of the normal 1-Wire bus overdrive timing. With the DS1922E the bus must be left low for no longer than 12s at overdrive to ensure that no DS1922E on the 1-Wire bus performs a reset. The DS1922E communicates properly when used in conjunction with a DS2480B or DS2490 1-Wire driver and adapters that are based on these driver chips. DS1922E Hardware Configuration The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to drive it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have open-drain or three-state outputs. The 1-Wire port of the DS1922E is open drain with an internal circuit equivalent to that shown in Figure 10. A multidrop bus consists of a 1-Wire bus with multiple slaves attached. At standard speed the 1-Wire bus has a maximum data rate of 16.3kbps. The speed can be boosted to 142kbps by activating the Overdrive Mode. The DS1922E is not guaranteed to be fully compliant to the iButton standard. Its maximum data rate in standard speed is 15.4kbps and 125kbps in overdrive speed. Transaction Sequence The protocol for accessing the DS1922E through the 1-Wire port is as follows: * Initialization * ROM Function Command * Memory/Control Function Command * Transaction/Data VPUP BUS MASTER RPUP Rx DATA Rx DS1922E 1-Wire PORT Tx Rx = RECEIVE Tx = TRANSMIT OPEN-DRAIN PORT PIN IL Tx 100 MOSFET Figure 10. Hardware Configuration ______________________________________________________________________________________ 29 High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E Initialization All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the slave(s). The presence pulse lets the bus master know that the DS1922E is on the bus and is ready to operate. For more details, see the 1-Wire Signaling section. numbers of all slave devices. For each bit of the registration number, starting with the least significant bit, the bus master issues a triplet of time slots. On the first slot, each slave device participating in the search outputs the true value of its registration number bit. On the second slot, each slave device participating in the search outputs the complemented value of its registration number bit. On the third slot, the master writes the true value of the bit to be selected. All slave devices that do not match the bit written by the master stop participating in the search. If both of the read bits are zero, the master knows that slave devices exist with both states of the bit. By choosing which state to write, the bus master branches in the ROM code tree. After one complete pass, the bus master knows the registration number of a single device. Additional passes identify the registration numbers of the remaining devices. Refer to Application Note 187: 1-Wire Search Algorithm for a detailed discussion, including an example. 1-Wire ROM Function Commands Once the bus master has detected a presence, it can issue one of the eight ROM function commands that the DS1922E supports. All ROM function commands are 8 bits long. A list of these commands follows (see the flowchart in Figure 11). Read ROM [33h] This command allows the bus master to read the DS1922E's 8-bit family code, unique 48-bit serial number, and 8-bit CRC. This command can only be used if there is a single slave on the bus. If more than one slave is present on the bus, a data collision occurs when all slaves try to transmit at the same time (open drain produces a wired-AND result). The resultant family code and 48-bit serial number results in a mismatch of the CRC. Conditional Search ROM [ECh] The Conditional Search ROM command operates similarly to the Search ROM command except that only those devices that fulfill certain conditions participate in the search. This function provides an efficient means for the bus master to identify devices on a multidrop system that have to signal an important event. After each pass of the conditional search that successfully determined the 64-bit ROM code for a specific device on the multidrop bus, that particular device can be individually accessed as if a Match ROM had been issued, since all other devices have dropped out of the search process and are waiting for a reset pulse. The DS1922E responds to the Conditional Search ROM command if one of the three alarm flags of the Alarm Status register (address 0214h) reads 1. The temperature alarm only occurs if enabled (see the Temperature Sensor Alarm section). The BOR alarm is always enabled. The first alarm that occurs makes the device respond to the Conditional Search ROM command. Match ROM [55h] The Match ROM command, followed by a 64-bit ROM sequence, allows the bus master to address a specific DS1922E on a multidrop bus. Only the DS1922E that exactly matches the 64-bit ROM sequence responds to the following memory function command. All other slaves wait for a reset pulse. This command can be used with a single device or multiple devices on the bus. Search ROM [F0h] When a system is initially brought up, the bus master might not know the number of devices on the 1-Wire bus or their registration numbers. By taking advantage of the wired-AND property of the bus, the master can use a process of elimination to identify the registration 30 ______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory Skip ROM [CCh] This command can save time in a single-drop bus system by allowing the bus master to access the memory functions without providing the 64-bit ROM code. For example, if more than one slave is present on the bus and a Read command is issued following the Skip ROM command, data collision occurs on the bus as multiple slaves transmit simultaneously (open-drain pulldowns produce a wired-AND result). Skip ROM command sets the DS1922E in the Overdrive Mode (OD = 1). All communication following this command must occur at overdrive speed until a reset pulse of minimum 690s duration resets all devices on the bus to standard speed (OD = 0). When issued on a multidrop bus, this command sets all overdrive-supporting devices into Overdrive Mode. To subsequently address a specific overdrive-supporting device, a reset pulse at overdrive speed must be issued followed by a Match ROM or Search ROM command sequence. This speeds up the time for the search process. If more than one slave supporting overdrive is present on the bus and the Overdrive-Skip ROM command is followed by a Read command, data collision occurs on the bus as multiple slaves transmit simultaneously (open-drain pulldowns produce a wiredAND result). DS1922E Resume [A5h] The DS1922E must be accessed several times before a mission starts. In a multidrop environment this means that the 64-bit ROM code after a Match ROM command must be repeated for every access. To maximize the data throughput in a multidrop environment, the Resume function was implemented. This function checks the status of the RC bit and, if it is set, directly transfers control to the memory/control functions, similar to a Skip ROM command. The only way to set the RC bit is through successfully executing the Match ROM, Search ROM, or Overdrive-Match ROM command. Once the RC bit is set, the device can repeatedly be accessed through the Resume command function. Accessing another device on the bus clears the RC bit, preventing two or more devices from simultaneously responding to the Resume command function. Overdrive-Match ROM [69h] The Overdrive-Match ROM command followed by a 64-bit ROM sequence transmitted at overdrive speed allows the bus master to address a specific DS1922E on a multidrop bus and to simultaneously set it in Overdrive Mode. Only the DS1922E that exactly matches the 64-bit ROM sequence responds to the subsequent memory/control function command. Slaves already in Overdrive Mode from a previous OverdriveSkip ROM or successful Overdrive-Match ROM command remain in Overdrive Mode. All overdrive-capable slaves return to standard speed at the next reset pulse of minimum 690s duration. The Overdrive-Match ROM command can be used with a single or multiple devices on the bus. Overdrive-Skip ROM [3Ch] On a single-drop bus this command can save time by allowing the bus master to access the memory/control functions without providing the 64-bit ROM code. Unlike the normal Skip ROM command, the Overdrive- ______________________________________________________________________________________ 31 High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E BUS MASTER Tx RESET PULSE FROM MEMORY FUNCTIONS FLOWCHART (FIGURE 9) OD RESET PULSE? FROM FIGURE 11b N OD = 0 Y BUS MASTER Tx ROM FUNCTION COMMAND DS1922E Tx PRESENCE PULSE 33h READ ROM COMMAND? Y RC = 0 N 55h MATCH ROM COMMAND? Y RC = 0 N F0h SEARCH ROM COMMAND? Y RC = 0 N ECh CONDITIONAL SEARCH COMMAND? Y RC = 0 N TO FIGURE 11b N CONDITION MET? Y DS1922E Tx FAMILY CODE (1 BYTE) DS1922E Tx BIT 0 MASTER Tx BIT 0 DS1922E Tx BIT 0 MASTER Tx BIT 0 DS1922E Tx BIT 0 DS1922E Tx BIT 0 MASTER Tx BIT 0 BIT 0 MATCH? N N BIT 0 MATCH? N BIT 0 MATCH? Y DS1922E Tx SERIAL NUMBER (6 BYTES) Y DS1922E Tx BIT 1 Y DS1922E Tx BIT 1 DS1922E Tx BIT 1 MASTER Tx BIT 1 MASTER Tx BIT 1 DS1922E Tx BIT 1 MASTER Tx BIT 1 BIT 1 MATCH? N N BIT 1 MATCH? Y DS1922E Tx BIT 63 N BIT 1 MATCH? Y DS1922E Tx BIT 63 DS1922E Tx BIT 63 MASTER Tx BIT 63 Y DS1922E Tx CRC BYTE MASTER Tx BIT 63 DS1922E Tx BIT 63 MASTER Tx BIT 63 BIT 63 MATCH? N N BIT 63 MATCH? N BIT 63 MATCH? Y RC = 1 Y RC = 1 Y RC = 1 TO FIGURE 11b FROM FIGURE 11b TO MEMORY FUNCTIONS FLOWCHART (FIGURE 9) Figure 11a. ROM Functions Flowchart 32 ______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E TO FIGURE 11a FROM FIGURE 11a CCh SKIP ROM COMMAND? Y RC = 0 N A5h RESUME COMMAND? Y N 3Ch OVERDRIVESKIP ROM? Y RC = 0; OD = 1 N 69h OVERDRIVEMATCH ROM? Y RC = 0; OD = 1 N RC = 1? N Y MASTER Tx RESET? N Y MASTER Tx BIT 0 (SEE NOTE) MASTER Tx RESET? N Y BIT 0 MATCH? N OD = 0 Y MASTER Tx BIT 1 (SEE NOTE) BIT 1 MATCH? N OD = 0 Y MASTER Tx BIT 63 (SEE NOTE) BIT 63 MATCH? N OD = 0 Y RC = 1 FROM FIGURE 11a TO FIGURE 11a NOTE: THE OD FLAG REMAINS AT 1 IF THE DEVICE WAS ALREADY AT OVERDRIVE SPEED BEFORE THE OVERDRIVE-MATCH ROM COMMAND WAS ISSUED. Figure 11b. ROM Functions Flowchart (continued) ______________________________________________________________________________________ 33 High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E 1-Wire Signaling The DS1922E requires strict protocols to ensure data integrity. The protocol consists of four types of signaling on one line: reset sequence with reset pulse and presence pulse, write-zero, write-one, and read-data. Except for the presence pulse, the bus master initiates all these signals. The DS1922E can communicate at two different speeds: standard speed and overdrive speed. If not explicitly set into the Overdrive Mode, the DS1922E communicates at standard speed. While in Overdrive Mode the fast timing applies to all waveforms. To get from idle to active, the voltage on the 1-Wire line needs to fall from VPUP below the threshold VTL. To get from active to idle, the voltage needs to rise from VILMAX past the threshold VTH. The time it takes for the voltage to make this rise is seen in Figure 12 as "" and its duration depends on the pullup resistor (RPUP) used and the capacitance of the 1-Wire network attached. The voltage VILMAX is relevant for the DS1922E when determining a logical level, not triggering any events. The initialization sequence required to begin any communication with the DS1922E is shown in Figure 12. A reset pulse followed by a presence pulse indicates the DS1922E is ready to receive data, given the correct ROM and memory function command. If the bus master uses slew-rate control on the falling edge, it must pull down the line for tRSTL + tF to compensate for the edge. A tRSTL duration of 690s or longer exits the Overdrive Mode, returning the device to standard speed. If the DS1922E is in Overdrive Mode and tRSTL is no longer than 80s, the device remains in Overdrive Mode. After the bus master has released the line, it goes into receive mode (Rx). Now the 1-Wire bus is pulled to VPUP through the pullup resistor or, in the case of a DS2480B driver, through active circuitry. When the threshold VTH is crossed, the DS1922E waits for tPDH and then transmits a presence pulse by pulling the line low for tPDL. To detect a presence pulse, the master must test the logical state of the 1-Wire line at tMSP. The t RSTH window must be at least the sum of t PDHMAX , t PDLMAX , and t RECMIN . Immediately after tRSTH is expired, the DS1922E is ready for data communication. In a mixed population network, t RSTH should be extended to minimum 480s at standard speed and 48s at overdrive speed to accommodate other 1-Wire devices. Read/Write Time Slots Data communication with the DS1922E takes place in time slots that carry a single bit each. Write time slots transport data from bus master to slave. Read time slots transfer data from slave to master. The definitions of the write and read time slots are illustrated in Figure 13. All communication begins with the master pulling the data line low. As the voltage on the 1-Wire line falls below the threshold VTL, the DS1922E starts its internal timing generator that determines when the data line is sampled during a write time slot and how long data is valid during a read time slot. MASTER Tx "RESET PULSE" VPUP VIHMASTER VTH VTL VILMAX 0V tRSTL tF tMSP MASTER Rx "PRESENCE PULSE" tPDH tPDL tRSTH tREC RESISTOR MASTER DS1922E Figure 12. Initialization Procedure: Reset and Presence Pulse 34 ______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory Master-to-Slave For a write-one time slot, the voltage on the data line must have crossed the VTH threshold before the write-one low time tW1LMAX is expired. For a write-zero time slot, the voltage on the data line must stay below the VTH threshold until the write-zero low time tW0LMIN is expired. The voltage on the data line should not exceed VILMAX during the entire tW0L or tW1L window. After the VTH threshold has been crossed, the DS1922E needs a recovery time tREC before it is ready for the next time slot. Slave-to-Master A read-data time slot begins like a write-one time slot. The voltage on the data line must remain below VTL until the read low time tRL is expired. During the tRL window, when responding with a 0, the DS1922E starts pulling the data line low; its internal timing generator determines when this pulldown ends and the voltage starts rising again. When responding with a 1, the DS1922E does not hold the data line low at all, and the voltage starts rising as soon as tRL is over. The sum of tRL + (rise time) on one side and the internal timing generator of the DS1922E on the other side define the master sampling window (t MSRMIN to tMSRMAX) in which the master must perform a read from the data line. For most reliable communication, t RL should be as short as permissible and the master should read close to but no later than tMSRMAX. After reading from the data line, the master must wait until tSLOT is expired. This guarantees sufficient recovery time tREC for the DS1922E to get ready for the next time slot. Note that tREC specified herein applies only to a single DS1922E attached to a 1-Wire line. For multiple device configurations, t REC must be extended to accommodate the additional 1-Wire device input capacitance. Alternatively, an interface that performs active pullup during the 1-Wire recovery time such as the DS2482-x00 or DS2480B 1-Wire line drivers can be used. points and branch points can add up or cancel each other to some extent. Such reflections are visible as glitches or ringing on the 1-Wire communication line. Noise coupled onto the 1-Wire line from external sources can also result in signal glitching. A glitch during the rising edge of a time slot can cause a slave device to lose synchronization with the master and, as a consequence, result in a Search ROM command coming to a dead end or cause a device-specific function command to abort. For better performance in network applications, the DS1922E uses a new 1-Wire front-end, which makes it less sensitive to noise and also reduces the magnitude of noise injected by the slave device itself. The DS1922E's 1-Wire front-end differs from traditional slave devices in four characteristics: 1) The falling edge of the presence pulse has a controlled slew rate. This provides a better match to the line impedance than a digitally switched transistor, converting the high-frequency ringing known from traditional devices into a smoother low-bandwidth transition. The slew-rate control is specified by the parameter tFPD, which has different values for standard and overdrive speed. 2) There is additional lowpass filtering in the circuit that detects the falling edge at the beginning of a time slot. This reduces the sensitivity to high-frequency noise. This additional filtering does not apply at overdrive speed. 3) There is a hysteresis at the low-to-high switching threshold VTH. If a negative glitch crosses VTH but does not go below VTH - VHY, it is not recognized (Figure 14, Case A). The hysteresis is effective at any 1-Wire speed. 4) There is a time window specified by the rising edge hold-off time tREH during which glitches are ignored, even if they extend below V TH - V HY threshold (Figure 14, Case B, t GL < t REH ). Deep voltage droops or glitches that appear late after crossing the VTH threshold and extend beyond the tREH window cannot be filtered out and are taken as the beginning of a new time slot (Figure 14, Case C, tGL tREH). Devices that have the parameters tFPD, VHY, and tREH specified in their electrical characteristics use the improved 1-Wire front-end. DS1922E Improved Network Behavior (Switchpoint Hysteresis) In a 1-Wire environment line termination is possible only during transients controlled by the bus master (1-Wire driver). 1-Wire networks, therefore, are susceptible to noise of various origins. Depending on the physical size and topology of the network, reflections from end ______________________________________________________________________________________ 35 High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E WRITE-ONE TIME SLOT tW1L VPUP VIHMASTER VTH VTL VILMAX 0V tF tSLOT RESISTOR MASTER WRITE-ZERO TIME SLOT tW0L VPUP VIHMASTER VTH VTL VILMAX 0V tF tSLOT RESISTOR MASTER tREC READ-DATA TIME SLOT tMSR tRL VPUP VIHMASTER VTH VTL VILMAX 0V tF MASTER SAMPLING WINDOW tSLOT RESISTOR MASTER DS1922E tREC Figure 13. Read/Write Timing Diagrams 36 ______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E tREH VPUP VTH tREH VHY CASE A CASE B tGL tGL CASE C 0V Figure 14. Noise Suppression Scheme POLYNOMIAL = X16 + X15 + X2 + 1 1ST STAGE X0 X1 2ND STAGE X2 3RD STAGE X3 4TH STAGE X4 5TH STAGE X5 6TH STAGE X6 7TH STAGE X7 8TH STAGE 9TH STAGE X8 X9 10TH STAGE X10 11TH STAGE X11 12TH STAGE X12 13TH STAGE X13 14TH STAGE X14 15TH STAGE X15 16TH STAGE X16 INPUT DATA CRC OUTPUT Figure 15. CRC-16 Hardware Description and Polynomial CRC Generation The DS1922E uses two types of CRCs. One CRC is an 8-bit type and is stored in the most significant byte of the 64-bit ROM. The bus master can compute a CRC value from the first 56 bits of the 64-bit ROM and compare it to the value stored within the DS1922E to determine if the ROM data has been received error-free. The equivalent polynomial function of this CRC is X8 + X5 + X4 + 1. This 8-bit CRC is received in the true (noninverted) form, and it is computed at the factory and lasered into the ROM. The other CRC is a 16-bit type, generated according to the standardized CRC-16 polynomial function x16 + x15 + x2 + 1. This CRC is used for error detection when reading register pages or the data-log memory using the Read Memory with CRC command and for fast verification of a data transfer when writing to or reading from the scratchpad. In contrast to the 8-bit CRC, the 16-bit CRC is always communicated in the inverted form. A CRC generator inside the DS1922E (Figure 15) calculates a new 16-bit CRC as shown in the command flowchart of Figure 9. The bus master compares the CRC value read from the device to the one it calculates from the data and decides whether to continue with an operation or to reread the portion of the data with the CRC error. With the initial pass through the Read Memory with CRC flowchart, the 16-bit CRC value is the result of shifting the command byte into the cleared CRC generator, followed by the two address bytes and the data bytes. The password is excluded from the CRC calculation. Subsequent passes through the Read Memory with CRC flowchart generate a 16-bit CRC that is the result of clearing the CRC generator and then shifting in the data bytes. With the Write Scratchpad command, the CRC is generated by first clearing the CRC generator and then shift37 ______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E ing in the command code, the target addresses TA1 and TA2, and all the data bytes. The DS1922E transmits this CRC only if the data bytes written to the scratchpad include scratchpad ending offset 11111b. The data can start at any location within the scratchpad. With the Read Scratchpad command, the CRC is generated by first clearing the CRC generator and then shifting in the command code, the target addresses TA1 and TA2, the E/S byte, and the scratchpad data starting at the target address. The DS1922E transmits this CRC only if the reading continues through the end of the scratchpad, regardless of the actual ending offset. For more information on generating CRC values, refer to Application Note 27. Command-Specific 1-Wire Communication Protocol--Legend SYMBOL RST PD Select WS RS CPS RMC CM FC SM STP TA TA-E/S 38 ______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory Command-Specific 1-Wire Communication Protocol--Color Codes Master-to-Slave Slave-to-Master DS1922E 1-Wire Communication Examples Write Scratchpad, Reaching the End of the Scratchpad (Cannot Fail) RST PD Select WS TA CRC-16 FF Loop Read Scratchpad (Cannot Fail) RST PD Select RS TA-E/S CRC-16 FF Loop Copy Scratchpad with Password (Success) RST PD Select CPS TA-E/S Copy Scratchpad with Password (Fail TA-E/S or Password) RST PD Select CPS TA-E/S Read Memory with Password and CRC (Success) RST PD Select RMC TA <32 Bytes> CRC-16 FF Loop Loop Read Memory with Password and CRC (Fail Password or Address) RST PD Select RMC TA Clear Memory with Password RST PD Select CM To verify success, read the General Status register at address 0215h. If MEMCLR is 1, the command was executed successfully. ______________________________________________________________________________________ 39 High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E 1-Wire Communication Examples (continued) Forced Conversion RST PD Select FC FFh FF Loop To read the result and to verify success, read the addresses 020Ch to 020Fh (results) and the device samples counter at address 0223h to 0225h. If the count has incremented, the command was executed successfully. Start Mission with Password RST PD Select SM To verify success, read the General Status register at address 0215h. If MIP is 1 and MEMCLR is 0, the command was executed successfully. Stop Mission with Password RST PD Select STP To verify success, read the General Status register at address 0215h. If MIP is 0, the command was executed successfully. Mission Example: Prepare and Start a New Mission Assumption: The previous mission has been ended by using the Stop Mission command. Passwords are not enabled. Starting a mission requires three steps: MASTER MODE Tx Rx Tx Tx Tx Tx Tx Rx Step 1: Clear the data of the previous mission. Step 2: Write the setup data to register page 1. Step 3: Start the new mission. Step 1: Clear the data of the previous mission. With only a single device connected to the bus master, the communication of step 1 looks like this: COMMENTS Reset pulse Presence pulse Issue "Skip ROM" command Issue "Clear Memory" command Send dummy password Send dummy byte Reset pulse Presence pulse DATA (LSB FIRST) (Reset) (Presence) CCh 96h <8 FFh bytes> FFh (Reset) (Presence) 40 ______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory Step 2: Write the setup data to register page 1. During the setup, the device needs to learn the following information: * Time and Date * Sample Rate * Alarm Thresholds ADDRESS 0200h 0201h 0202h 0203h 0204h 0205h 0206h 0207h 0208h 0209h 020Ah 020Bh 020Ch 020Dh 020Eh 020Fh 0210h 0211h 0212h 0213h 0214h 0215h 0216h 0217h 0218h DATA 00h 30h 15h 01h 04h 08h 0Ah 00h 08h F2h 00h FFh FFh FFh FFh FFh 02h FCh 01h C1h FFh FFh 5Ah 00h 00h 90 minutes Mission start delay Enable high alarm Disabled On (enabled), EHSS = 0 (low sample rate) Normal start; no rollover; 8-bit temperature log (Don't care) Temperature alarm control (Not applicable with DS1922E) RTC oscillator control, sample rate selection General mission control Clock through read-only registers (Don't care) Clock through read-only registers Every 10 minutes (EHSS = 0) 18C low 135C high (Don't care) Sample rate Temperature alarm thresholds (Not applicable with DS1922E) 1st of April in 2008 Date 15:30:00 hours Time EXAMPLE VALUES * Alarm Controls (Response to Conditional Search) * General Mission Parameters (e.g., Channels to Log and Logging Format, Rollover, Start Mode) * Mission Start Delay The following data sets up the DS1922E for a mission that logs temperature using 8-bit format. DS1922E FUNCTION ______________________________________________________________________________________ 41 High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E With only a single device connected to the bus master, the communication of step 2 looks like this: MASTER MODE Tx Rx Tx Tx Tx Tx Tx Tx Tx Rx Tx Tx Rx Rx Rx Rx Tx Rx Tx Tx Tx Tx Tx Tx Tx Rx DATA (LSB FIRST) (Reset) (Presence) CCh 0Fh 00h 02h <25 Data Bytes> <7 FFh Bytes> (Reset) (Presence) CCh AAh 00h 02h 1Fh <32 Data Bytes> (Reset) (Presence) CCh 99h 00h 02h 1Fh <8 FFh Bytes> (Reset) (Presence) Reset pulse Presence pulse Issue "Skip ROM" command Issue "Write Scratchpad" command TA1, beginning offset = 00h TA2, address = 0200h Write 25 bytes of data to scratchpad Write through the end of the scratchpad Reset pulse Presence pulse Issue "Skip ROM" command Issue "Read Scratchpad" command Read TA1, beginning offset = 00h Read TA2, address = 0200h Read E/S, ending offset = 1Fh, flags = 0h Read scratchpad data and verify Reset pulse Presence pulse Issue "Skip ROM" command Issue "Copy Scratchpad" command TA1 TA2 E/S Send dummy password Reset pulse Presence pulse (AUTHORIZATION CODE) COMMENTS Step 3: Start the new mission. With only a single device connected to the bus master, the communication of step 3 looks like this: MASTER MODE Tx Rx Tx Tx Tx Tx Tx Rx If step 3 was successful, the MIP bit in the General Status register is 1, the MEMCLR bit is 0, and the mission start delay counts down. COMMENTS Reset pulse Presence pulse Issue "Skip ROM" command Issue "Start Mission" command Send dummy password Send dummy byte Reset pulse Presence pulse DATA (LSB FIRST) (Reset) (Presence) CCh CCh <8 FFh Bytes> FFh (Reset) (Presence) 42 ______________________________________________________________________________________ High-Temperature Logger iButton with 8KB Data-Log Memory Software Correction Algorithm for Temperature The correction algorithm described in the DS1922L/ DS1922T data sheet does not apply to the DS1922E. If attempted, the corrected result is generally less accurate than the raw temperature data read from the device. Therefore, with the DS1922E the memory pages 18 and 19 are available as additional user memory. Pin Configuration F5 SIZE 5.89mm 0.51mm BRANDING DS1922E iB ut t o n (R). c 16.25mm om A1 YY (R) 41 Thermochron(R) 000000FBC52B F5 1-Wire(R) 0 W Z Z Z DS1 9 2 2 E # 17.35mm W IO GND Package Information For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE F5 iButton PACKAGE CODE IB#6CB OUTLINE NO. 21-0266 LAND PATTERN NO. -- ______________________________________________________________________________________ 43 High-Temperature Logger iButton with 8KB Data-Log Memory DS1922E Revision History REVISION NUMBER 0 1 2 REVISION DATE 7/08 10/08 6/09 Initial release Added the Software Correction Algorithm for Temperature section Changed storage temperature range in Absolute Maximum Ratings and added a recommended storage temperature note for maximum battery lifetime Updated UL certificate reference; added paragraph on validation certificates to Detailed Description section; added more details on the Device Samples Counter in the Other Indicators section DESCRIPTION PAGES CHANGED -- 43 2 3 4/11 1, 5, 6, 18 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 44 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2011 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc. |
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